1. Field of the Invention
An aspect of the present invention relates to a mask pattern data generation method for use in manufacturing a semiconductor device, a mask manufacturing method based on the mask pattern data generation method, a semiconductor device manufacturing method based thereon, and a pattern data generation program for use in manufacturing a semiconductor device.
2. Description of the Related Art
Recent years have seen very remarkable progress in semiconductor manufacturing technology. Semiconductors are mass-produced using fine circuit patterns that have a processing dimension of 0.09 μm or so. As miniaturization of circuit patterns progresses, an effect of a process proximity effect (PPE) on a mask manufacturing process, a lithography process, an etching process, and the like increases. Thus, e.g., when a mask pattern having substantially the same shape as that of a design circuit pattern is transfer-formed on a semiconductor substrate using a lithography process or the like, sometimes, a pattern formed on a substrate largely differs from a design circuit pattern.
Thus, in order to form a circuit pattern on a substrate as designed, a process proximity correction (PPC) process to correct a mask pattern in consideration the process proximity effect is utilized. In the PPC process, a finished pattern to be formed on a substrate is calculated on data by performing a process simulation of a process of transfer-forming a mask pattern on a semiconductor substrate. Then, the mask pattern (represented by mask pattern data) is repeatedly corrected such that the calculated pattern data represents the pattern having substantially the same shape as that of a design pattern.
Hitherto, not only the correction of the dimensional accuracy of a pattern formed on a substrate under a given process condition such as a condition for the PPC but also the correction of a mask pattern to be performed so as to sufficiently assure a process margin (see, e.g., JP-2002-131882-A) have been studied as the correction of the mask pattern. The process margin is defined as an amount of allowable variation of a process parameter corresponding to a mask pattern. That is, the process margin is determined by an allowable varying range of the process parameter, which is set so that the dimensional error between the pattern formed on the substrate and the design pattern, which is caused according to variation of the process parameter in a pattern forming process, is within an allowable error range in which the specifications of a semiconductor device are not impaired.